From 4b6140b96dfe4a43cd4d6c00588f1c93b52bff92 Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Tue, 8 Feb 2022 13:12:25 +0200 Subject: [PATCH] ARM: dts: at91: Use the generic "crypto" node name for the crypto IPs The DT specification recommeds that: "The name of a node should be somewhat generic, reflecting the function of the device and not its precise programming model. If appropriate, the name should be one of the following choices:" "crypto" being the recommendation for the crypto nodes. Follow the DT recommendation and use the generic "crypto" node name for the at91 crypto IPs. While at this, add labels to the crypto nodes where they missed, for easier reference purposes. Signed-off-by: Tudor Ambarus Acked-by: Krzysztof Kozlowski Signed-off-by: Nicolas Ferre Link: https://lore.kernel.org/r/20220208111225.234685-1-tudor.ambarus@microchip.com --- arch/arm/boot/dts/sam9x60.dtsi | 6 +++--- arch/arm/boot/dts/sama5d2.dtsi | 6 +++--- arch/arm/boot/dts/sama5d3.dtsi | 6 +++--- arch/arm/boot/dts/sama5d4.dtsi | 6 +++--- 4 files changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi index e3afa1dae2079..998629a3c34f2 100644 --- a/arch/arm/boot/dts/sam9x60.dtsi +++ b/arch/arm/boot/dts/sam9x60.dtsi @@ -270,7 +270,7 @@ clock-names = "pclk", "gclk"; }; - sha: sha@f002c000 { + sha: crypto@f002c000 { compatible = "atmel,at91sam9g46-sha"; reg = <0xf002c000 0x100>; interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>; @@ -289,7 +289,7 @@ clocks = <&pmc PMC_TYPE_PERIPHERAL 38>; }; - aes: aes@f0034000 { + aes: crypto@f0034000 { compatible = "atmel,at91sam9g46-aes"; reg = <0xf0034000 0x100>; interrupts = <39 IRQ_TYPE_LEVEL_HIGH 0>; @@ -304,7 +304,7 @@ clock-names = "aes_clk"; }; - tdes: tdes@f0038000 { + tdes: crypto@f0038000 { compatible = "atmel,at91sam9g46-tdes"; reg = <0xf0038000 0x100>; interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>; diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 1b070376d67aa..89c71d419f82a 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -306,7 +306,7 @@ status = "disabled"; }; - sha@f0028000 { + sha: crypto@f0028000 { compatible = "atmel,at91sam9g46-sha"; reg = <0xf0028000 0x100>; interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; @@ -318,7 +318,7 @@ clock-names = "sha_clk"; }; - aes@f002c000 { + aes: crypto@f002c000 { compatible = "atmel,at91sam9g46-aes"; reg = <0xf002c000 0x100>; interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>; @@ -1082,7 +1082,7 @@ #gpio-cells = <2>; }; - tdes@fc044000 { + tdes: crypto@fc044000 { compatible = "atmel,at91sam9g46-tdes"; reg = <0xfc044000 0x100>; interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>; diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index d1841bffe3c57..8fa423c52592d 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -381,7 +381,7 @@ status = "disabled"; }; - sha@f8034000 { + sha: crypto@f8034000 { compatible = "atmel,at91sam9g46-sha"; reg = <0xf8034000 0x100>; interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>; @@ -391,7 +391,7 @@ clock-names = "sha_clk"; }; - aes@f8038000 { + aes: crypto@f8038000 { compatible = "atmel,at91sam9g46-aes"; reg = <0xf8038000 0x100>; interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>; @@ -402,7 +402,7 @@ clock-names = "aes_clk"; }; - tdes@f803c000 { + tdes: crypto@f803c000 { compatible = "atmel,at91sam9g46-tdes"; reg = <0xf803c000 0x100>; interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>; diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi index 4de164905e03c..7b9242664875c 100644 --- a/arch/arm/boot/dts/sama5d4.dtsi +++ b/arch/arm/boot/dts/sama5d4.dtsi @@ -673,7 +673,7 @@ status = "disabled"; }; - aes@fc044000 { + aes: crypto@fc044000 { compatible = "atmel,at91sam9g46-aes"; reg = <0xfc044000 0x100>; interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; @@ -686,7 +686,7 @@ clock-names = "aes_clk"; }; - tdes@fc04c000 { + tdes: crpyto@fc04c000 { compatible = "atmel,at91sam9g46-tdes"; reg = <0xfc04c000 0x100>; interrupts = <14 IRQ_TYPE_LEVEL_HIGH 0>; @@ -699,7 +699,7 @@ clock-names = "tdes_clk"; }; - sha@fc050000 { + sha: crypto@fc050000 { compatible = "atmel,at91sam9g46-sha"; reg = <0xfc050000 0x100>; interrupts = <15 IRQ_TYPE_LEVEL_HIGH 0>; -- 2.30.2