From 4c246408f0bdbc4100c95a5dad9e0688b4a3cfd0 Mon Sep 17 00:00:00 2001 From: Zhen Lei Date: Mon, 12 Oct 2020 14:12:22 +0800 Subject: [PATCH] ARM: dts: hisilicon: fix errors detected by spi-pl022.yaml 1. Change clock-names to "sspclk", "apb_pclk". Both of them use the same clock. Signed-off-by: Zhen Lei Signed-off-by: Wei Xu --- arch/arm/boot/dts/hi3519.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/hi3519.dtsi b/arch/arm/boot/dts/hi3519.dtsi index 630753c0d7044..c524c854d3192 100644 --- a/arch/arm/boot/dts/hi3519.dtsi +++ b/arch/arm/boot/dts/hi3519.dtsi @@ -127,8 +127,8 @@ compatible = "arm,pl022", "arm,primecell"; reg = <0x12120000 0x1000>; interrupts = ; - clocks = <&crg HI3519_SPI0_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HI3519_SPI0_CLK>, <&crg HI3519_SPI0_CLK>; + clock-names = "sspclk", "apb_pclk"; num-cs = <1>; #address-cells = <1>; #size-cells = <0>; @@ -139,8 +139,8 @@ compatible = "arm,pl022", "arm,primecell"; reg = <0x12121000 0x1000>; interrupts = ; - clocks = <&crg HI3519_SPI1_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HI3519_SPI1_CLK>, <&crg HI3519_SPI1_CLK>; + clock-names = "sspclk", "apb_pclk"; num-cs = <1>; #address-cells = <1>; #size-cells = <0>; @@ -151,8 +151,8 @@ compatible = "arm,pl022", "arm,primecell"; reg = <0x12122000 0x1000>; interrupts = ; - clocks = <&crg HI3519_SPI2_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HI3519_SPI2_CLK>, <&crg HI3519_SPI2_CLK>; + clock-names = "sspclk", "apb_pclk"; num-cs = <1>; #address-cells = <1>; #size-cells = <0>; -- 2.30.2