From 50638f7dbd0b3969b47d2772c4db02ed92b6c47b Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Wed, 4 Aug 2021 15:26:53 -0400 Subject: [PATCH] drm/amdgpu/pm/amdgpu_smu: convert more IP version checking MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Use IP versions rather than asic_type to differentiate IP version specific features. v2: switch if statement to a switch statement Acked-by: Christian König (v1) Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 46 +++++++++++------------ 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c index 8acc14ecb5cf0..0e266b5b79c29 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c @@ -455,8 +455,7 @@ static int smu_get_power_num_states(void *handle, bool is_support_sw_smu(struct amdgpu_device *adev) { - if ((adev->asic_type >= CHIP_ARCTURUS) || - (adev->ip_versions[MP1_HWIP] >= IP_VERSION(11, 0, 0))) + if (adev->ip_versions[MP1_HWIP] >= IP_VERSION(11, 0, 0)) return true; return false; @@ -602,23 +601,19 @@ static int smu_set_funcs(struct amdgpu_device *adev) case IP_VERSION(11, 0, 8): cyan_skillfish_set_ppt_funcs(smu); break; - default: - switch (adev->asic_type) { - case CHIP_ARCTURUS: - adev->pm.pp_feature &= ~PP_GFXOFF_MASK; - arcturus_set_ppt_funcs(smu); - /* OD is not supported on Arcturus */ - smu->od_enabled =false; - break; - case CHIP_ALDEBARAN: - aldebaran_set_ppt_funcs(smu); - /* Enable pp_od_clk_voltage node */ - smu->od_enabled = true; - break; - default: - return -EINVAL; - } + case IP_VERSION(11, 0, 2): + adev->pm.pp_feature &= ~PP_GFXOFF_MASK; + arcturus_set_ppt_funcs(smu); + /* OD is not supported on Arcturus */ + smu->od_enabled =false; break; + case IP_VERSION(13, 0, 2): + aldebaran_set_ppt_funcs(smu); + /* Enable pp_od_clk_voltage node */ + smu->od_enabled = true; + break; + default: + return -EINVAL; } return 0; @@ -2306,15 +2301,20 @@ int smu_get_power_limit(void *handle, } else { switch (limit_level) { case SMU_PPT_LIMIT_CURRENT: - if ((smu->adev->asic_type == CHIP_ALDEBARAN) || - (adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 7)) || - (adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 11)) || - (adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 12)) || - (adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 13))) + switch (adev->ip_versions[MP1_HWIP]) { + case IP_VERSION(13, 0, 2): + case IP_VERSION(11, 0, 7): + case IP_VERSION(11, 0, 11): + case IP_VERSION(11, 0, 12): + case IP_VERSION(11, 0, 13): ret = smu_get_asic_power_limits(smu, &smu->current_power_limit, NULL, NULL); + break; + default: + break; + } *limit = smu->current_power_limit; break; case SMU_PPT_LIMIT_DEFAULT: -- 2.30.2