From 533a7836d39f1a60dc78fb46f6cde9a25ffafe2d Mon Sep 17 00:00:00 2001 From: =?utf8?q?Juha-Pekka=20Heikkil=C3=A4?= Date: Tue, 19 Sep 2023 12:21:21 -0700 Subject: [PATCH] drm/i915/xe2lpd: Enable odd size and panning for planar yuv MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Enable odd size and panning for planar yuv formats. Cc: Suraj Kandpal Signed-off-by: Juha-Pekka Heikkilä Reviewed-by: Suraj Kandpal Signed-off-by: Lucas De Marchi Link: https://patchwork.freedesktop.org/patch/msgid/20230919192128.2045154-15-lucas.demarchi@intel.com --- drivers/gpu/drm/i915/display/intel_atomic_plane.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c index d7a0bd686e499..b1074350616cc 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c @@ -981,6 +981,14 @@ int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state) if (fb->format->format == DRM_FORMAT_RGB565 && rotated) { hsub = 2; vsub = 2; + } else if (DISPLAY_VER(i915) >= 20 && + intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) { + /* + * This allows NV12 and P0xx formats to have odd size and/or odd + * source coordinates on DISPLAY_VER(i915) >= 20 + */ + hsub = 1; + vsub = 1; } else { hsub = fb->format->hsub; vsub = fb->format->vsub; -- 2.30.2