From 5715698507ee09ebe92791e3ff9224e256f14231 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Tue, 10 Jan 2023 19:59:05 -0800 Subject: [PATCH] arm64: dts: qcom: sa8295-adp: Enable DP instances The SA8295P ADP has, among other interfaces, six MiniDP connectors which are connected to MDSS0 DP2 and DP3, and MDSS1 DP0 through DP3. Enable Display Clock controllers, MDSS instanced, MDPs, DP controllers, DP PHYs and link them all together. Signed-off-by: Bjorn Andersson Signed-off-by: Bjorn Andersson Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230111035906.2975494-4-quic_bjorande@quicinc.com --- arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 243 ++++++++++++++++++++++- 1 file changed, 241 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts index c8437efe8235c..80cb18d9e4811 100644 --- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts +++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts @@ -24,6 +24,90 @@ chosen { stdout-path = "serial0:115200n8"; }; + + dp2-connector { + compatible = "dp-connector"; + label = "DP2"; + type = "mini"; + + hpd-gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>; + + port { + dp2_connector_in: endpoint { + remote-endpoint = <&mdss1_dp0_phy_out>; + }; + }; + }; + + dp3-connector { + compatible = "dp-connector"; + label = "DP3"; + type = "mini"; + + hpd-gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>; + + port { + dp3_connector_in: endpoint { + remote-endpoint = <&mdss1_dp1_phy_out>; + }; + }; + }; + + edp0-connector { + compatible = "dp-connector"; + label = "EDP0"; + type = "mini"; + + hpd-gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; + + port { + edp0_connector_in: endpoint { + remote-endpoint = <&mdss0_dp2_phy_out>; + }; + }; + }; + + edp1-connector { + compatible = "dp-connector"; + label = "EDP1"; + type = "mini"; + + hpd-gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; + + port { + edp1_connector_in: endpoint { + remote-endpoint = <&mdss0_dp3_phy_out>; + }; + }; + }; + + edp2-connector { + compatible = "dp-connector"; + label = "EDP2"; + type = "mini"; + + hpd-gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>; + + port { + edp2_connector_in: endpoint { + remote-endpoint = <&mdss1_dp2_phy_out>; + }; + }; + }; + + edp3-connector { + compatible = "dp-connector"; + label = "EDP3"; + type = "mini"; + + hpd-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>; + + port { + edp3_connector_in: endpoint { + remote-endpoint = <&mdss1_dp3_phy_out>; + }; + }; + }; }; &apps_rsc { @@ -160,13 +244,168 @@ vreg_l8g: ldo8 { regulator-name = "vreg_l8g"; - regulator-min-microvolt = <880000>; - regulator-max-microvolt = <880000>; + regulator-min-microvolt = <912000>; + regulator-max-microvolt = <912000>; + regulator-initial-mode = ; + }; + + vreg_l11g: ldo11 { + regulator-name = "vreg_l11g"; + regulator-min-microvolt = <912000>; + regulator-max-microvolt = <912000>; regulator-initial-mode = ; }; }; }; +&dispcc0 { + status = "okay"; +}; + +&dispcc1 { + status = "okay"; +}; + +&mdss0 { + status = "okay"; +}; + +&mdss0_dp2 { + data-lanes = <0 1 2 3>; + + status = "okay"; + + ports { + port@1 { + reg = <1>; + mdss0_dp2_phy_out: endpoint { + remote-endpoint = <&edp0_connector_in>; + }; + }; + }; +}; + +&mdss0_dp2_phy { + vdda-phy-supply = <&vreg_l8g>; + vdda-pll-supply = <&vreg_l3g>; + + status = "okay"; +}; + +&mdss0_dp3 { + data-lanes = <0 1 2 3>; + + status = "okay"; + + ports { + port@1 { + reg = <1>; + mdss0_dp3_phy_out: endpoint { + remote-endpoint = <&edp1_connector_in>; + }; + }; + }; +}; + +&mdss0_dp3_phy { + vdda-phy-supply = <&vreg_l8g>; + vdda-pll-supply = <&vreg_l3g>; + + status = "okay"; +}; + +&mdss1 { + status = "okay"; +}; + +&mdss1_dp0 { + data-lanes = <0 1 2 3>; + + status = "okay"; + + ports { + port@1 { + reg = <1>; + mdss1_dp0_phy_out: endpoint { + remote-endpoint = <&dp2_connector_in>; + }; + }; + }; +}; + +&mdss1_dp0_phy { + vdda-phy-supply = <&vreg_l11g>; + vdda-pll-supply = <&vreg_l3g>; + + status = "okay"; +}; + +&mdss1_dp1 { + data-lanes = <0 1 2 3>; + + status = "okay"; + + ports { + port@1 { + reg = <1>; + mdss1_dp1_phy_out: endpoint { + remote-endpoint = <&dp3_connector_in>; + }; + }; + }; +}; + +&mdss1_dp1_phy { + vdda-phy-supply = <&vreg_l11g>; + vdda-pll-supply = <&vreg_l3g>; + + status = "okay"; +}; + +&mdss1_dp2 { + data-lanes = <0 1 2 3>; + + status = "okay"; + + ports { + port@1 { + reg = <1>; + mdss1_dp2_phy_out: endpoint { + remote-endpoint = <&edp2_connector_in>; + }; + }; + }; +}; + +&mdss1_dp2_phy { + vdda-phy-supply = <&vreg_l11g>; + vdda-pll-supply = <&vreg_l3g>; + + status = "okay"; +}; + +&mdss1_dp3 { + data-lanes = <0 1 2 3>; + + status = "okay"; + + ports { + port@1 { + reg = <1>; + mdss1_dp3_phy_out: endpoint { + remote-endpoint = <&edp3_connector_in>; + }; + }; + }; +}; + +&mdss1_dp3_phy { + vdda-phy-supply = <&vreg_l11g>; + vdda-pll-supply = <&vreg_l3g>; + + status = "okay"; +}; + &pcie2a { perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>; wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>; -- 2.30.2