From 59b96ea4c220f41837b183697def20aa9ec89857 Mon Sep 17 00:00:00 2001 From: Vadim Pasternak Date: Tue, 22 Aug 2023 11:34:38 +0000 Subject: [PATCH] platform: mellanox: Modify reset causes description MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit For system of classes VMOD0005, VMOD0010: - remove "reset_from_comex", since this cause doesn't define specific reason. - add more specific reason "reset_sw_reset", which is set along with removed "reset_from_comex". Signed-off-by: Vadim Pasternak Reviewed-by: Michael Shych Reviewed-by: Hans de Goede Reviewed-by: Ilpo Järvinen Link: https://lore.kernel.org/r/20230822113451.13785-4-vadimp@nvidia.com Signed-off-by: Hans de Goede --- drivers/platform/x86/mlx-platform.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c index 647a10252c2f6..5b0579752afb6 100644 --- a/drivers/platform/x86/mlx-platform.c +++ b/drivers/platform/x86/mlx-platform.c @@ -3556,12 +3556,6 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { .mask = GENMASK(7, 0) & ~BIT(2), .mode = 0444, }, - { - .label = "reset_from_comex", - .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, - .mask = GENMASK(7, 0) & ~BIT(4), - .mode = 0444, - }, { .label = "reset_from_asic", .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, @@ -3580,6 +3574,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { .mask = GENMASK(7, 0) & ~BIT(7), .mode = 0444, }, + { + .label = "reset_sw_reset", + .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET, + .mask = GENMASK(7, 0) & ~BIT(0), + .mode = 0444, + }, { .label = "reset_comex_pwr_fail", .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET, -- 2.30.2