From 5c1bf1e3209ecb163b9d74b134776ce8c326fd4f Mon Sep 17 00:00:00 2001 From: Hai Pham Date: Wed, 12 Oct 2022 16:06:51 +0200 Subject: [PATCH] arm64: dts: renesas: white-hawk-cpu: Add QSPI FLASH support Describe the QSPI FLASH on the White Hawk CPU board. Signed-off-by: Hai Pham Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/c3a01a8de924d6a3fcdb1ee0284544ad2ea5c8ec.1665583435.git.geert+renesas@glider.be --- .../dts/renesas/r8a779g0-white-hawk-cpu.dtsi | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi index b306e5a10794d..bb4dd08781ca2 100644 --- a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi @@ -232,12 +232,45 @@ power-source = <1800>; }; + qspi0_pins: qspi0 { + groups = "qspi0_ctrl", "qspi0_data4"; + function = "qspi0"; + }; + scif_clk_pins: scif_clk { groups = "scif_clk"; function = "scif_clk"; }; }; +&rpc { + pinctrl-0 = <&qspi0_pins>; + pinctrl-names = "default"; + + status = "okay"; + + flash@0 { + compatible = "spansion,s25fs512s", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + spi-rx-bus-width = <4>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot@0 { + reg = <0x0 0x1200000>; + read-only; + }; + user@1200000 { + reg = <0x1200000 0x2e00000>; + }; + }; + }; +}; + &scif_clk { clock-frequency = <24000000>; }; -- 2.30.2