From 5e7922abddd4aab1dd604aa3fc7905d2c638c92b Mon Sep 17 00:00:00 2001 From: Jisheng Zhang Date: Mon, 29 Apr 2024 08:13:10 +0800 Subject: [PATCH] riscv: dts: starfive: add 'cpus' label to jh7110 and jh7100 soc dtsi Add the 'cpus' label so that we can reference it in board dts files. Signed-off-by: Jisheng Zhang Reviewed-by: Emil Renner Berthing Signed-off-by: Conor Dooley --- arch/riscv/boot/dts/starfive/jh7100.dtsi | 2 +- arch/riscv/boot/dts/starfive/jh7110.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi index 9a2e9583af88d..7de0732b8eabe 100644 --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi @@ -13,7 +13,7 @@ #address-cells = <2>; #size-cells = <2>; - cpus { + cpus: cpus { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 4a5708f7fcf72..18047195c600b 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -15,7 +15,7 @@ #address-cells = <2>; #size-cells = <2>; - cpus { + cpus: cpus { #address-cells = <1>; #size-cells = <0>; -- 2.30.2