From 60671c4feee550e5597565866a9d8e1001ffa770 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 4 Apr 2023 21:01:11 +0200 Subject: [PATCH] dt-bindings: phy: cadence-sierra: drop assigned-clocks The meta schema from DT schema already defines assigned-clocks, so there is no need for device schema to mention it at all. There are also no benefits of having it here and a board could actually need more of clock assignments than the schema allows. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20230404190115.546973-1-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul --- .../devicetree/bindings/phy/phy-cadence-sierra.yaml | 8 -------- 1 file changed, 8 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml index c3d1fa102798c..37f028f7a0955 100644 --- a/Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml +++ b/Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml @@ -61,14 +61,6 @@ properties: - const: pll0_refclk - const: pll1_refclk - assigned-clocks: - minItems: 1 - maxItems: 2 - - assigned-clock-parents: - minItems: 1 - maxItems: 2 - cdns,autoconf: type: boolean description: -- 2.30.2