From 61dc1a73684b9ff5c44f22d9cbc994a2e5db6d6f Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 13 Jan 2023 14:05:38 +0200 Subject: [PATCH] clk: qcom: cpu-8996: setup PLLs before registering clocks Setup all PLLs before registering clocks in the common clock framework. This ensures that the clocks are not accessed before being setup in the known way and that the CCF is in sync with the actual HW programming. Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230113120544.59320-9-dmitry.baryshkov@linaro.org --- drivers/clk/qcom/clk-cpu-8996.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c index cc7ece6a77026..5c8e57133dd1f 100644 --- a/drivers/clk/qcom/clk-cpu-8996.c +++ b/drivers/clk/qcom/clk-cpu-8996.c @@ -430,6 +430,11 @@ static int qcom_cpu_clk_msm8996_register_clks(struct device *dev, { int i, ret; + clk_alpha_pll_configure(&pwrcl_pll, regmap, &hfpll_config); + clk_alpha_pll_configure(&perfcl_pll, regmap, &hfpll_config); + clk_alpha_pll_configure(&pwrcl_alt_pll, regmap, &altpll_config); + clk_alpha_pll_configure(&perfcl_alt_pll, regmap, &altpll_config); + for (i = 0; i < ARRAY_SIZE(cpu_msm8996_hw_clks); i++) { ret = devm_clk_hw_register(dev, cpu_msm8996_hw_clks[i]); if (ret) @@ -442,11 +447,6 @@ static int qcom_cpu_clk_msm8996_register_clks(struct device *dev, return ret; } - clk_alpha_pll_configure(&pwrcl_pll, regmap, &hfpll_config); - clk_alpha_pll_configure(&perfcl_pll, regmap, &hfpll_config); - clk_alpha_pll_configure(&pwrcl_alt_pll, regmap, &altpll_config); - clk_alpha_pll_configure(&perfcl_alt_pll, regmap, &altpll_config); - /* Enable alt PLLs */ clk_prepare_enable(pwrcl_alt_pll.clkr.hw.clk); clk_prepare_enable(perfcl_alt_pll.clkr.hw.clk); -- 2.30.2