From 67533f873ad7e2a4af1a1ed47f03f501d6c770df Mon Sep 17 00:00:00 2001 From: =?utf8?q?Cl=C3=A9ment=20P=C3=A9ron?= Date: Mon, 20 Apr 2020 15:00:17 +0200 Subject: [PATCH] arm64: dts: allwinner: h6: Enable CPU opp tables for Beelink GS1 MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Enable CPU opp tables for Beelink GS1. This needs to change the CPU regulator max voltage to fit the OPP table. Also add the ramp-delay information to avoid any out of spec running as the regulator is slower at reaching the voltage requested compare to the PLL reaching the frequency. There is no such information for AXP805 but similar PMIC (AXP813) has a DVM (Dynamic Voltage scaling Management) ramp rate equal to 2500uV/us. Signed-off-by: Clément Péron Signed-off-by: Maxime Ripard --- arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts index 8f09d209359b7..3f7ceeb1a767a 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts @@ -4,6 +4,7 @@ /dts-v1/; #include "sun50i-h6.dtsi" +#include "sun50i-h6-cpu-opp.dtsi" #include @@ -77,6 +78,10 @@ }; }; +&cpu0 { + cpu-supply = <®_dcdca>; +}; + &de { status = "okay"; }; @@ -234,7 +239,8 @@ reg_dcdca: dcdca { regulator-always-on; regulator-min-microvolt = <810000>; - regulator-max-microvolt = <1080000>; + regulator-max-microvolt = <1160000>; + regulator-ramp-delay = <2500>; regulator-name = "vdd-cpu"; }; @@ -242,6 +248,7 @@ regulator-enable-ramp-delay = <32000>; regulator-min-microvolt = <810000>; regulator-max-microvolt = <1080000>; + regulator-ramp-delay = <2500>; regulator-name = "vdd-gpu"; }; -- 2.30.2