From 6956c18f4ad9200aa945f7ea37d65a05afc49d51 Mon Sep 17 00:00:00 2001 From: Marijn Suijten Date: Thu, 14 Jul 2022 22:38:22 +0200 Subject: [PATCH] clk: qcom: gcc-sdm660: Use floor ops for SDCC1 clock In commit 3f905469c8ce ("clk: qcom: gcc: Use floor ops for SDCC clocks") floor ops were applied to SDCC2 only, but flooring is also required on the SDCC1 apps clock which is used by the eMMC card on Sony's Nile platform, and otherwise result in the typicial "Card appears overclocked" warnings observed on many other platforms before: mmc0: Card appears overclocked; req 52000000 Hz, actual 100000000 Hz mmc0: Card appears overclocked; req 52000000 Hz, actual 100000000 Hz mmc0: Card appears overclocked; req 104000000 Hz, actual 192000000 Hz Fixes: f2a76a2955c0 ("clk: qcom: Add Global Clock controller (GCC) driver for SDM660") Signed-off-by: Marijn Suijten Tested-by: Alexey Minnekhanov Reviewed-by: Stephen Boyd Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220714203822.186448-1-marijn.suijten@somainline.org --- drivers/clk/qcom/gcc-sdm660.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/qcom/gcc-sdm660.c b/drivers/clk/qcom/gcc-sdm660.c index 9b97425008ce1..db918c92a522c 100644 --- a/drivers/clk/qcom/gcc-sdm660.c +++ b/drivers/clk/qcom/gcc-sdm660.c @@ -757,7 +757,7 @@ static struct clk_rcg2 sdcc1_apps_clk_src = { .name = "sdcc1_apps_clk_src", .parent_data = gcc_parent_data_xo_gpll0_gpll4_gpll0_early_div, .num_parents = ARRAY_SIZE(gcc_parent_data_xo_gpll0_gpll4_gpll0_early_div), - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_floor_ops, }, }; -- 2.30.2