From 74341af7d6c7093bba0893a7efd53d30aa50a200 Mon Sep 17 00:00:00 2001
From: =?utf8?q?Philippe=20Mathieu-Daud=C3=A9?= <f4bug@amsat.org>
Date: Sun, 3 Oct 2021 14:41:57 +0200
Subject: [PATCH] target/mips: Use tcg_constant_i32() in gen_msa_2r()
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Avoid using a TCG temporary by moving Data Format to the constant pool.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211003175743.3738710-5-f4bug@amsat.org>
---
target/mips/tcg/msa_translate.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/target/mips/tcg/msa_translate.c b/target/mips/tcg/msa_translate.c
index 5e8f80f2f2..bbe9146513 100644
--- a/target/mips/tcg/msa_translate.c
+++ b/target/mips/tcg/msa_translate.c
@@ -1946,7 +1946,6 @@ static void gen_msa_2r(DisasContext *ctx)
uint8_t df = (ctx->opcode >> 16) & 0x3;
TCGv_i32 twd = tcg_const_i32(wd);
TCGv_i32 tws = tcg_const_i32(ws);
- TCGv_i32 tdf = tcg_const_i32(df);
switch (MASK_MSA_2R(ctx->opcode)) {
case OPC_FILL_df:
@@ -1957,7 +1956,8 @@ static void gen_msa_2r(DisasContext *ctx)
break;
}
#endif
- gen_helper_msa_fill_df(cpu_env, tdf, twd, tws); /* trs */
+ gen_helper_msa_fill_df(cpu_env, tcg_constant_i32(df),
+ twd, tws); /* trs */
break;
case OPC_NLOC_df:
switch (df) {
@@ -2015,7 +2015,6 @@ static void gen_msa_2r(DisasContext *ctx)
tcg_temp_free_i32(twd);
tcg_temp_free_i32(tws);
- tcg_temp_free_i32(tdf);
}
static void gen_msa_2rf(DisasContext *ctx)
--
2.30.2