From 7865cd5aae2267b8b1efd1019279b9a6e1a11941 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Mon, 27 Jul 2020 05:06:39 +0300 Subject: [PATCH] drm: mxsfb: Use LCDC_CTRL register name explicitly The LCDC_CTRL register is located at address 0x0000. Some of the accesses to the register simply use the mxsfb->base address. Reference the LCDC_CTRL register explicitly instead to clarify the code. Signed-off-by: Laurent Pinchart Reviewed-by: Stefan Agner Reviewed-by: Emil Velikov Signed-off-by: Stefan Agner Link: https://patchwork.freedesktop.org/patch/msgid/20200727020654.8231-8-laurent.pinchart@ideasonboard.com --- drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c index be60c4021e2fb..722bd9b4f5f9a 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c +++ b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c @@ -170,17 +170,17 @@ static int mxsfb_reset_block(struct mxsfb_drm_private *mxsfb) { int ret; - ret = clear_poll_bit(mxsfb->base, MODULE_SFTRST); + ret = clear_poll_bit(mxsfb->base + LCDC_CTRL, MODULE_SFTRST); if (ret) return ret; - writel(MODULE_CLKGATE, mxsfb->base + MXS_CLR_ADDR); + writel(MODULE_CLKGATE, mxsfb->base + LCDC_CTRL + MXS_CLR_ADDR); - ret = clear_poll_bit(mxsfb->base, MODULE_SFTRST); + ret = clear_poll_bit(mxsfb->base + LCDC_CTRL, MODULE_SFTRST); if (ret) return ret; - return clear_poll_bit(mxsfb->base, MODULE_CLKGATE); + return clear_poll_bit(mxsfb->base + LCDC_CTRL, MODULE_CLKGATE); } static dma_addr_t mxsfb_get_fb_paddr(struct mxsfb_drm_private *mxsfb) -- 2.30.2