From 7c40270be76d0ee33455bba728d508f5dddfc604 Mon Sep 17 00:00:00 2001 From: Bhawanpreet Lakha Date: Thu, 21 May 2020 12:28:39 -0400 Subject: [PATCH] drm/amd/display: Add DCN3 chip ids Signed-off-by: Bhawanpreet Lakha Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/include/dal_asic_id.h | 4 ++++ drivers/gpu/drm/amd/display/include/dal_types.h | 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/amd/display/include/dal_asic_id.h b/drivers/gpu/drm/amd/display/include/dal_asic_id.h index 2359e88d60296..abeb58d544b11 100644 --- a/drivers/gpu/drm/amd/display/include/dal_asic_id.h +++ b/drivers/gpu/drm/amd/display/include/dal_asic_id.h @@ -166,6 +166,7 @@ enum { NV_NAVI10_P_A0 = 1, NV_NAVI12_P_A0 = 10, NV_NAVI14_M_A0 = 20, + NV_SIENNA_CICHLID_P_A0 = 40, NV_UNKNOWN = 0xFF }; @@ -173,6 +174,9 @@ enum { #define ASICREV_IS_NAVI12_P(eChipRev) ((eChipRev >= NV_NAVI12_P_A0) && (eChipRev < NV_NAVI14_M_A0)) #define ASICREV_IS_NAVI14_M(eChipRev) ((eChipRev >= NV_NAVI14_M_A0) && (eChipRev < NV_UNKNOWN)) #define ASICREV_IS_RENOIR(eChipRev) ((eChipRev >= RENOIR_A0) && (eChipRev < RAVEN1_F0)) +#if defined(CONFIG_DRM_AMD_DC_DCN3_0) +#define ASICREV_IS_SIENNA_CICHLID_P(eChipRev) ((eChipRev >= NV_SIENNA_CICHLID_P_A0)) +#endif /* * ASIC chip ID diff --git a/drivers/gpu/drm/amd/display/include/dal_types.h b/drivers/gpu/drm/amd/display/include/dal_types.h index 0b6859189ca74..b67c9fa6b9cd4 100644 --- a/drivers/gpu/drm/amd/display/include/dal_types.h +++ b/drivers/gpu/drm/amd/display/include/dal_types.h @@ -48,6 +48,7 @@ enum dce_version { DCN_VERSION_1_01, DCN_VERSION_2_0, DCN_VERSION_2_1, + DCN_VERSION_3_0, DCN_VERSION_MAX }; -- 2.30.2