From 7cef6004ecf8ca9aef383318515e759338475a46 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Fri, 17 Mar 2017 12:42:30 +0100 Subject: [PATCH] drm/etnaviv: update MLCG disables with info from newer Vivante driver PA clock gating can be enabled when the right bugfix bit is present. There are broken revs of GC4000 and GC2000, which need TX clock gating to be disabled. Signed-off-by: Lucas Stach --- drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c index 9a9c407178018..d4c7b443a757c 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c @@ -523,9 +523,10 @@ static void etnaviv_gpu_enable_mlcg(struct etnaviv_gpu *gpu) pmc = gpu_read(gpu, VIVS_PM_MODULE_CONTROLS); - /* Disable PA clock gating for GC400+ except for GC420 */ + /* Disable PA clock gating for GC400+ without bugfix except for GC420 */ if (gpu->identity.model >= chipModel_GC400 && - gpu->identity.model != chipModel_GC420) + gpu->identity.model != chipModel_GC420 && + !(gpu->identity.minor_features3 & chipMinorFeatures3_BUG_FIXES12)) pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_PA; /* @@ -541,6 +542,11 @@ static void etnaviv_gpu_enable_mlcg(struct etnaviv_gpu *gpu) if (gpu->identity.revision < 0x5422) pmc |= BIT(15); /* Unknown bit */ + /* Disable TX clock gating on affected core revisions. */ + if (etnaviv_is_model_rev(gpu, GC4000, 0x5222) || + etnaviv_is_model_rev(gpu, GC2000, 0x5108)) + pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_TX; + pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_HZ; pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_EZ; -- 2.30.2