From 7d3d0fe4e96df4e0812f5054ed36af466f547cdb Mon Sep 17 00:00:00 2001 From: Vadim Pasternak Date: Tue, 22 Aug 2023 11:34:40 +0000 Subject: [PATCH] platform: mellanox: mlx-platform: Add reset cause attribute MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Extend IO registers description for some system types with reset cause attribute "reset_swb_dc_dc_pwr_fail" to indicate reset caused by switch board DC-DC power failure. Signed-off-by: Vadim Pasternak Reviewed-by: Michael Shych Reviewed-by: Hans de Goede Reviewed-by: Ilpo Järvinen Link: https://lore.kernel.org/r/20230822113451.13785-6-vadimp@nvidia.com Signed-off-by: Hans de Goede --- drivers/platform/x86/mlx-platform.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c index 648b27eff0b08..8e07ed3dc552f 100644 --- a/drivers/platform/x86/mlx-platform.c +++ b/drivers/platform/x86/mlx-platform.c @@ -3558,6 +3558,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { .mask = GENMASK(7, 0) & ~BIT(2), .mode = 0444, }, + { + .label = "reset_swb_dc_dc_pwr_fail", + .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, + .mask = GENMASK(7, 0) & ~BIT(3), + .mode = 0444, + }, { .label = "reset_from_asic", .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -- 2.30.2