From 7d9e0b121640b4bcaf81ba458f4676345ca49942 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Beh=C3=BAn?= Date: Fri, 3 Sep 2021 17:26:15 +0200 Subject: [PATCH] dt-bindings: clk: fixed-mmio-clock: Convert to YAML MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Convert the binding documentatoin for fixed-mmio-clock to YAML. Signed-off-by: Marek Behún Link: https://lore.kernel.org/r/20210903152615.31453-1-kabel@kernel.org Reviewed-by: Rob Herring Reviewed-by: Stephen Boyd Signed-off-by: Stephen Boyd --- .../bindings/clock/fixed-mmio-clock.txt | 24 ---------- .../bindings/clock/fixed-mmio-clock.yaml | 47 +++++++++++++++++++ 2 files changed, 47 insertions(+), 24 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/fixed-mmio-clock.txt create mode 100644 Documentation/devicetree/bindings/clock/fixed-mmio-clock.yaml diff --git a/Documentation/devicetree/bindings/clock/fixed-mmio-clock.txt b/Documentation/devicetree/bindings/clock/fixed-mmio-clock.txt deleted file mode 100644 index c359367fd1a97..0000000000000 --- a/Documentation/devicetree/bindings/clock/fixed-mmio-clock.txt +++ /dev/null @@ -1,24 +0,0 @@ -Binding for simple memory mapped io fixed-rate clock sources. -The driver reads a clock frequency value from a single 32-bit memory mapped -I/O register and registers it as a fixed rate clock. - -It was designed for test systems, like FPGA, not for complete, finished SoCs. - -This binding uses the common clock binding[1]. - -[1] Documentation/devicetree/bindings/clock/clock-bindings.txt - -Required properties: -- compatible : shall be "fixed-mmio-clock". -- #clock-cells : from common clock binding; shall be set to 0. -- reg : Address and length of the clock value register set. - -Optional properties: -- clock-output-names : From common clock binding. - -Example: -sysclock: sysclock@fd020004 { - #clock-cells = <0>; - compatible = "fixed-mmio-clock"; - reg = <0xfd020004 0x4>; -}; diff --git a/Documentation/devicetree/bindings/clock/fixed-mmio-clock.yaml b/Documentation/devicetree/bindings/clock/fixed-mmio-clock.yaml new file mode 100644 index 0000000000000..1453ac849a659 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/fixed-mmio-clock.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/fixed-mmio-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Binding for simple memory mapped IO fixed-rate clock sources + +description: + This binding describes a fixed-rate clock for which the frequency can + be read from a single 32-bit memory mapped I/O register. + + It was designed for test systems, like FPGA, not for complete, + finished SoCs. + +maintainers: + - Jan Kotas + +properties: + compatible: + const: fixed-mmio-clock + + reg: + maxItems: 1 + + "#clock-cells": + const: 0 + + clock-output-names: + maxItems: 1 + +required: + - compatible + - reg + - "#clock-cells" + +additionalProperties: false + +examples: + - | + sysclock: sysclock@fd020004 { + compatible = "fixed-mmio-clock"; + #clock-cells = <0>; + reg = <0xfd020004 0x4>; + clock-output-names = "sysclk"; + }; +... -- 2.30.2