From 7e0fac6a0da54557230ac3898688f37392404cdf Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Sun, 13 Dec 2020 12:37:53 -0600 Subject: [PATCH] arm64: dts: renesas: beacon: Enable SPI The baseboard routes the SPI to a header which can/will be configured at either the kit level or using device tree overlays. Because the baseboard be supporting more than one kit, enable at the baseboard level rather than a bunch of duplicates later. Signed-off-by: Adam Ford Link: https://lore.kernel.org/r/20201213183759.223246-14-aford173@gmail.com Signed-off-by: Geert Uytterhoeven --- .../boot/dts/renesas/beacon-renesom-baseboard.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi index 987df78ec44ec..cb316e7363643 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi @@ -478,6 +478,13 @@ }; }; +&msiof1 { + pinctrl-0 = <&msiof1_pins>; + pinctrl-names = "default"; + status = "okay"; + cs-gpios = <&gpio3 10 GPIO_ACTIVE_LOW>; +}; + &ohci0 { dr_mode = "otg"; status = "okay"; @@ -531,6 +538,11 @@ bias-pull-down; }; + msiof1_pins: msiof1 { + groups = "msiof1_clk_g", "msiof1_rxd_g", "msiof1_txd_g"; + function = "msiof1"; + }; + pwm0_pins: pwm0 { groups = "pwm0"; function = "pwm0"; -- 2.30.2