From 816cc4d6c693a68523e4afcbe419aac8af05b1d7 Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Mon, 3 Feb 2020 20:21:10 +0000 Subject: [PATCH] drm/i915/gt: Fix rc6 on Ivybridge The current rc6 threshold is larger than the evaluation interval on Ivybridge; it never enters rc6. Remove the special casing so it behaves like the other gen6/gen7, and we see rc6 residencies before we manually park the system. Closes: https://gitlab.freedesktop.org/drm/intel/issues/1114 Testcase: igt/i915_pm_rc6_residency/rc6-idle #ivb Signed-off-by: Chris Wilson Cc: Andi Shyti Reviewed-by: Andi Shyti Link: https://patchwork.freedesktop.org/patch/msgid/20200203202110.670209-1-chris@chris-wilson.co.uk --- drivers/gpu/drm/i915/gt/intel_rc6.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c index 01a99fdbb3c4e..682f598f70420 100644 --- a/drivers/gpu/drm/i915/gt/intel_rc6.c +++ b/drivers/gpu/drm/i915/gt/intel_rc6.c @@ -226,10 +226,7 @@ static void gen6_rc6_enable(struct intel_rc6 *rc6) set(uncore, GEN6_RC_SLEEP, 0); set(uncore, GEN6_RC1e_THRESHOLD, 1000); - if (IS_IVYBRIDGE(i915)) - set(uncore, GEN6_RC6_THRESHOLD, 125000); - else - set(uncore, GEN6_RC6_THRESHOLD, 50000); + set(uncore, GEN6_RC6_THRESHOLD, 50000); set(uncore, GEN6_RC6p_THRESHOLD, 150000); set(uncore, GEN6_RC6pp_THRESHOLD, 64000); /* unused */ -- 2.30.2