From 8da71ebad8455cde05bb6c148c84f3954b788497 Mon Sep 17 00:00:00 2001 From: Chunfeng Yun Date: Wed, 14 Sep 2022 14:07:43 +0800 Subject: [PATCH] phy: phy-mtk-tphy: disable hardware efuse when set INTR INTR's value is able autoload from hardware efuse by default, when software tries to update its value, should disable hardware efuse firstly. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Chunfeng Yun Link: https://lore.kernel.org/r/20220914060746.10004-4-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul --- drivers/phy/mediatek/phy-mtk-tphy.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c b/drivers/phy/mediatek/phy-mtk-tphy.c index 986fde0f63a09..7f40b8b052bd5 100644 --- a/drivers/phy/mediatek/phy-mtk-tphy.c +++ b/drivers/phy/mediatek/phy-mtk-tphy.c @@ -874,9 +874,14 @@ static void u2_phy_props_set(struct mtk_tphy *tphy, mtk_phy_update_bits(com + U3P_USBPHYACR1, PA1_RG_TERM_SEL, PA1_RG_TERM_SEL_VAL(instance->eye_term)); - if (instance->intr) + if (instance->intr) { + if (u2_banks->misc) + mtk_phy_set_bits(u2_banks->misc + U3P_MISC_REG1, + MR1_EFUSE_AUTO_LOAD_DIS); + mtk_phy_update_bits(com + U3P_USBPHYACR1, PA1_RG_INTR_CAL, PA1_RG_INTR_CAL_VAL(instance->intr)); + } if (instance->discth) mtk_phy_update_bits(com + U3P_USBPHYACR6, PA6_RG_U2_DISCTH, -- 2.30.2