From 9664e1ba47fd27e2f21132ba6798c34adcaea288 Mon Sep 17 00:00:00 2001 From: Konstantin Aladyshev Date: Wed, 11 Jan 2023 14:52:27 +0300 Subject: [PATCH] ARM: dts: aspeed: ethanolx: Enable CTS/RTS pins on UART1 BMC UART1 is connected to the P0 CPU UART1. As the connection has CTS and RTS signals, enable these functions on the BMC side. Signed-off-by: Konstantin Aladyshev Link: https://lore.kernel.org/r/20230111115227.1357-1-aladyshev22@gmail.com Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts b/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts index e1f97721ada5c..90feac5ec6281 100644 --- a/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts +++ b/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts @@ -80,7 +80,9 @@ status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_txd1_default - &pinctrl_rxd1_default>; + &pinctrl_rxd1_default + &pinctrl_nrts1_default + &pinctrl_ncts1_default>; }; &uart5 { -- 2.30.2