From 981f808e641c624fdf4ece806b599ae66e875ee4 Mon Sep 17 00:00:00 2001 From: "Roy-CW.Yeh" Date: Mon, 6 Feb 2023 17:11:05 +0800 Subject: [PATCH] arm64: dts: mediatek: mt8195: add MMSYS configuration for VPPSYS With the change of the MMSYS binding file for MT8195, the compatible name of VPPSYS in dts need to be fixed to match the definition. Signed-off-by: Roy-CW.Yeh Signed-off-by: Moudy Ho Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai Link: https://lore.kernel.org/r/20230206091109.1324-3-moudy.ho@mediatek.com Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 8f1264d5290bf..5261367031426 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -1795,8 +1795,8 @@ #clock-cells = <1>; }; - vppsys0: clock-controller@14000000 { - compatible = "mediatek,mt8195-vppsys0"; + vppsys0: syscon@14000000 { + compatible = "mediatek,mt8195-vppsys0", "syscon"; reg = <0 0x14000000 0 0x1000>; #clock-cells = <1>; }; @@ -1900,8 +1900,8 @@ power-domains = <&spm MT8195_POWER_DOMAIN_WPESYS>; }; - vppsys1: clock-controller@14f00000 { - compatible = "mediatek,mt8195-vppsys1"; + vppsys1: syscon@14f00000 { + compatible = "mediatek,mt8195-vppsys1", "syscon"; reg = <0 0x14f00000 0 0x1000>; #clock-cells = <1>; }; -- 2.30.2