From 99c04671b1e9c08faf5155c0d7347c91932ca2a0 Mon Sep 17 00:00:00 2001 From: Evgenii Krasnikov Date: Thu, 21 Apr 2022 17:18:19 -0400 Subject: [PATCH] drm/amd/display: Reset cached PSR parameters after hibernate [WHY] After hibernate system might be using old invalid psr_power_opt and psr_allow_active that never get reset [HOW] Reset cached Panel Self Refresh parameters when PSR is first configured for eDP in dc_link_setup_psr. Reviewed-by: Anthony Koo Acked-by: Stylon Wang Signed-off-by: Evgenii Krasnikov Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c index 3d13ee32a3dbf..48e274f9ea848 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c @@ -3317,9 +3317,12 @@ bool dc_link_setup_psr(struct dc_link *link, */ psr_context->frame_delay = 0; - if (psr) + if (psr) { link->psr_settings.psr_feature_enabled = psr->funcs->psr_copy_settings(psr, link, psr_context, panel_inst); + link->psr_settings.psr_power_opt = 0; + link->psr_settings.psr_allow_active = 0; + } else link->psr_settings.psr_feature_enabled = dmcu->funcs->setup_psr(dmcu, link, psr_context); -- 2.30.2