From 9c1082fd1b1b8fd0f990ef917ddeff977fd320ab Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Wed, 20 Apr 2022 21:19:25 +0200 Subject: [PATCH] dt-bindings: pinctrl: ocelot: add reset property On the LAN966x SoC the GPIO controller will be resetted together with the SGPIO and the switch core. Add a phandle to register the shared reset line. Signed-off-by: Michael Walle Acked-by: Rob Herring Link: https://lore.kernel.org/r/20220420191926.3411830-2-michael@walle.cc Signed-off-by: Linus Walleij --- .../devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml index 7149a66556231..98d547c34ef37 100644 --- a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml @@ -42,6 +42,14 @@ properties: "#interrupt-cells": const: 2 + resets: + maxItems: 1 + + reset-names: + description: Optional shared switch reset. + items: + - const: switch + patternProperties: '-pins$': type: object -- 2.30.2