From b3bca7b8fa7c5d81c0b4bc0762aee6ca1424d72c Mon Sep 17 00:00:00 2001 From: =?utf8?q?Jouni=20H=C3=B6gander?= Date: Tue, 29 Aug 2023 12:44:35 +0300 Subject: [PATCH] drm/i915/psr: Apply Wa_14015648006 for all display 14 steppings MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit According to recent Bspec Wa 14015648006 has to be applied for all display 14 steppings. Bspec: 66624 Signed-off-by: Jouni Högander Reviewed-by: Matt Roper Signed-off-by: Matt Roper Link: https://patchwork.freedesktop.org/patch/msgid/20230829094435.2100669-1-jouni.hogander@intel.com --- drivers/gpu/drm/i915/display/intel_psr.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 72887c29fb515..e5a0522066d5c 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1360,8 +1360,7 @@ static void wm_optimization_wa(struct intel_dp *intel_dp, bool set_wa_bit = false; /* Wa_14015648006 */ - if (IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 0), STEP_A0, STEP_B0) || - IS_DISPLAY_VER(dev_priv, 11, 13)) + if (IS_DISPLAY_VER(dev_priv, 11, 14)) set_wa_bit |= crtc_state->wm_level_disabled; /* Wa_16013835468 */ -- 2.30.2