From b6e91ebfe06f1d90331d162259553a5330514143 Mon Sep 17 00:00:00 2001
From: =?utf8?q?Andreas=20F=C3=A4rber?= <afaerber@suse.de>
Date: Wed, 16 Jan 2013 04:13:19 +0100
Subject: [PATCH] target-sparc: Introduce QOM realizefn for SPARCCPU
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Introduce realizefn and set realized = true in cpu_sparc_init().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-sparc/cpu-qom.h |  2 ++
 target-sparc/cpu.c     | 17 ++++++++++++++++-
 2 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/target-sparc/cpu-qom.h b/target-sparc/cpu-qom.h
index 2a738ae360..89cd1cf2d3 100644
--- a/target-sparc/cpu-qom.h
+++ b/target-sparc/cpu-qom.h
@@ -38,6 +38,7 @@
 
 /**
  * SPARCCPUClass:
+ * @parent_realize: The parent class' realize handler.
  * @parent_reset: The parent class' reset handler.
  *
  * A SPARC CPU model.
@@ -47,6 +48,7 @@ typedef struct SPARCCPUClass {
     CPUClass parent_class;
     /*< public >*/
 
+    DeviceRealize parent_realize;
     void (*parent_reset)(CPUState *cpu);
 } SPARCCPUClass;
 
diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c
index 4bc1afc755..1690cf5b15 100644
--- a/target-sparc/cpu.c
+++ b/target-sparc/cpu.c
@@ -122,7 +122,8 @@ SPARCCPU *cpu_sparc_init(const char *cpu_model)
         object_unref(OBJECT(cpu));
         return NULL;
     }
-    qemu_init_vcpu(env);
+
+    object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
 
     return cpu;
 }
@@ -851,6 +852,16 @@ void cpu_dump_state(CPUSPARCState *env, FILE *f, fprintf_function cpu_fprintf,
     cpu_fprintf(f, "\n");
 }
 
+static void sparc_cpu_realizefn(DeviceState *dev, Error **errp)
+{
+    SPARCCPU *cpu = SPARC_CPU(dev);
+    SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(dev);
+
+    qemu_init_vcpu(&cpu->env);
+
+    scc->parent_realize(dev, errp);
+}
+
 static void sparc_cpu_initfn(Object *obj)
 {
     SPARCCPU *cpu = SPARC_CPU(obj);
@@ -871,6 +882,10 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data)
 {
     SPARCCPUClass *scc = SPARC_CPU_CLASS(oc);
     CPUClass *cc = CPU_CLASS(oc);
+    DeviceClass *dc = DEVICE_CLASS(oc);
+
+    scc->parent_realize = dc->realize;
+    dc->realize = sparc_cpu_realizefn;
 
     scc->parent_reset = cc->reset;
     cc->reset = sparc_cpu_reset;
-- 
2.30.2