From bf9987c06eb8274c2503174b944b8fbe94cc24d7 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Wed, 4 Dec 2024 21:49:34 +0100 Subject: [PATCH] rust: pl011: simplify handling of the FIFO enabled bit in LCR MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Use ==/!= instead of going through bool and xor. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Paolo Bonzini --- rust/hw/char/pl011/src/device.rs | 6 ++---- rust/hw/char/pl011/src/lib.rs | 6 ------ 2 files changed, 2 insertions(+), 10 deletions(-) diff --git a/rust/hw/char/pl011/src/device.rs b/rust/hw/char/pl011/src/device.rs index 4d620b442e..18cc122951 100644 --- a/rust/hw/char/pl011/src/device.rs +++ b/rust/hw/char/pl011/src/device.rs @@ -302,9 +302,7 @@ impl PL011State { Ok(LCR_H) => { let new_val: registers::LineControl = value.into(); // Reset the FIFO state on FIFO enable or disable - if bool::from(self.line_control.fifos_enabled()) - ^ bool::from(new_val.fifos_enabled()) - { + if self.line_control.fifos_enabled() != new_val.fifos_enabled() { self.reset_rx_fifo(); self.reset_tx_fifo(); } @@ -497,7 +495,7 @@ impl PL011State { #[inline] pub fn fifo_enabled(&self) -> bool { - matches!(self.line_control.fifos_enabled(), registers::Mode::FIFO) + self.line_control.fifos_enabled() == registers::Mode::FIFO } #[inline] diff --git a/rust/hw/char/pl011/src/lib.rs b/rust/hw/char/pl011/src/lib.rs index 0747e130ca..69064d6929 100644 --- a/rust/hw/char/pl011/src/lib.rs +++ b/rust/hw/char/pl011/src/lib.rs @@ -419,12 +419,6 @@ pub mod registers { FIFO = 1, } - impl From for bool { - fn from(val: Mode) -> Self { - matches!(val, Mode::FIFO) - } - } - #[bitsize(2)] #[derive(Clone, Copy, Debug, Eq, FromBits, PartialEq)] /// `WLEN` Word length, field of [Line Control register](LineControl). -- 2.30.2