From bfbf2de2c9f467219b472e99c303449634fc3186 Mon Sep 17 00:00:00 2001 From: Shubhrajyoti Datta Date: Sat, 21 Jul 2018 17:19:07 +0530 Subject: [PATCH] dt-bindings: serial: Add binding for uartlite The uartlite devicetree binding was missed out. Add the binding documentation for uartlite that is already in use. Signed-off-by: Shubhrajyoti Datta Reviewed-by: Rob Herring Signed-off-by: Greg Kroah-Hartman --- .../bindings/serial/xlnx,opb-uartlite.txt | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt diff --git a/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt b/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt new file mode 100644 index 0000000000000..c37deb44deada --- /dev/null +++ b/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt @@ -0,0 +1,23 @@ +Xilinx Axi Uartlite controller Device Tree Bindings +--------------------------------------------------------- + +Required properties: +- compatible : Can be either of + "xlnx,xps-uartlite-1.00.a" + "xlnx,opb-uartlite-1.00.b" +- reg : Physical base address and size of the Axi Uartlite + registers map. +- interrupts : Should contain the UART controller interrupt. + +Optional properties: +- port-number : Set Uart port number +- clock-names : Should be "s_axi_aclk" +- clocks : Input clock specifier. Refer to common clock bindings. + +Example: +serial@800c0000 { + compatible = "xlnx,xps-uartlite-1.00.a"; + reg = <0x0 0x800c0000 0x10000>; + interrupts = <0x0 0x6e 0x1>; + port-number = <0>; +}; -- 2.30.2