From c3f7c14856ebbeb8e9e19439b9f5ec66f88744b9 Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Mon, 9 Oct 2023 10:37:49 +0100 Subject: [PATCH] riscv: dts: allwinner: convert isa detection to new properties Convert the D1 devicetrees to use the new properties "riscv,isa-base" & "riscv,isa-extensions". For compatibility with other projects, "riscv,isa" remains. Acked-by: Jernej Skrabec Signed-off-by: Conor Dooley Link: https://lore.kernel.org/r/20231009-moonlight-gray-92debdc89f30@wendy Signed-off-by: Jernej Skrabec --- arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi index 0856f18dc3cfa..64c3c2e6cbe02 100644 --- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi @@ -25,6 +25,9 @@ mmu-type = "riscv,sv39"; operating-points-v2 = <&opp_table_cpu>; riscv,isa = "rv64imafdc"; + riscv,isa-base = "rv64i"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", + "zifencei", "zihpm"; #cooling-cells = <2>; cpu0_intc: interrupt-controller { -- 2.30.2