From cac34b2b3f5a9d4471a2660ec52599b6015bfc51 Mon Sep 17 00:00:00 2001 From: Huqiang Qin Date: Thu, 20 Jul 2023 19:46:39 +0800 Subject: [PATCH] arm64: dts: Add gpio_intc node and pinctrl node for Amlogic C3 SoCs Add gpio interrupt controller device and pinctrl device. Signed-off-by: Huqiang Qin Reviewed-by: Dmitry Rokosov Link: https://lore.kernel.org/r/20230720114639.833436-1-huqiang.qin@amlogic.com Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi | 26 +++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi index 60ad4f3eef9d7..5a3725f6cf3d7 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi @@ -72,6 +72,32 @@ #size-cells = <2>; ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>; + periphs_pinctrl: pinctrl@4000 { + compatible = "amlogic,c3-periphs-pinctrl"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gpio: bank@4000 { + reg = <0x0 0x4000 0x0 0x004c>, + <0x0 0x4100 0x0 0x01de>; + reg-names = "mux", "gpio"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&periphs_pinctrl 0 0 55>; + }; + }; + + gpio_intc: interrupt-controller@4080 { + compatible = "amlogic,meson-gpio-intc", + "amlogic,c3-gpio-intc"; + reg = <0x0 0x4080 0x0 0x0020>; + interrupt-controller; + #interrupt-cells = <2>; + amlogic,channel-interrupts = + <10 11 12 13 14 15 16 17 18 19 20 21>; + }; + uart_b: serial@7a000 { compatible = "amlogic,meson-s4-uart", "amlogic,meson-ao-uart"; -- 2.30.2