From cc1965b02d6cb18d9220dae06f7e2e0b0ebbea48 Mon Sep 17 00:00:00 2001 From: Siddharth Vadapalli Date: Sun, 4 Feb 2024 14:33:36 +0530 Subject: [PATCH] dt-bindings: mfd: syscon: Add ti,j784s4-pcie-ctrl compatible The PCIE_CTRL registers within the CTRL_MMR space of TI's J784S4 SoC are used to configure the link speed, lane count and mode of operation of the respective PCIe instance. Add compatible for allowing the PCIe driver to obtain a regmap for the PCIE_CTRL register within the System Controller device-tree node in order to configure the PCIe instance accordingly. The Technical Reference Manual for J784S4 SoC with details of the PCIE_CTRL registers is available at: https://www.ti.com/lit/zip/spruj52 Signed-off-by: Siddharth Vadapalli Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240204090336.3209063-1-s-vadapalli@ti.com Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/syscon.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 084b5c2a2a3c2..2376b612f94ef 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -73,6 +73,7 @@ properties: - rockchip,rv1126-qos - starfive,jh7100-sysmain - ti,am654-dss-oldi-io-ctrl + - ti,j784s4-pcie-ctrl - const: syscon -- 2.30.2