From d03396a8bb19b77d4d0fa2ad2143999510f0d44e Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 31 Aug 2023 16:24:41 -0700 Subject: [PATCH] target/arm: Enable SCTLR_EL1.TIDCP for user-only The linux kernel detects and enables this bit. Once trapped, EC_SYSTEMREGISTERTRAP is treated like EC_UNCATEGORIZED, so no changes required within linux-user/aarch64/cpu_loop.c. Signed-off-by: Richard Henderson Message-id: 20230831232441.66020-6-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/cpu.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 0bb0585441..b9e09a702d 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -243,6 +243,10 @@ static void arm_cpu_reset_hold(Object *obj) SCTLR_EnDA | SCTLR_EnDB); /* Trap on btype=3 for PACIxSP. */ env->cp15.sctlr_el[1] |= SCTLR_BT0; + /* Trap on implementation defined registers. */ + if (cpu_isar_feature(aa64_tidcp1, cpu)) { + env->cp15.sctlr_el[1] |= SCTLR_TIDCP; + } /* and to the FP/Neon instructions */ env->cp15.cpacr_el1 = FIELD_DP64(env->cp15.cpacr_el1, CPACR_EL1, FPEN, 3); -- 2.30.2