From d07b4d0ea72311b619c0f3799d849957446b5761 Mon Sep 17 00:00:00 2001
From: blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Mon, 19 Nov 2007 19:14:10 +0000
Subject: [PATCH] Fix MXCC register 64 bit read word order (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3709 c046a42c-6fe2-441c-8c8c-71466251a162
---
target-sparc/op_helper.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index 699a305b29..d22b2e8d37 100644
--- a/target-sparc/op_helper.c
+++ b/target-sparc/op_helper.c
@@ -196,8 +196,8 @@ void helper_ld_asi(int asi, int size, int sign)
switch (T0) {
case 0x01c00a00: /* MXCC control register */
if (size == 8) {
- ret = env->mxccregs[3];
- T0 = env->mxccregs[3] >> 32;
+ ret = env->mxccregs[3] >> 32;
+ T0 = env->mxccregs[3];
} else
DPRINTF_MXCC("%08x: unimplemented access size: %d\n", T0, size);
break;
@@ -217,8 +217,8 @@ void helper_ld_asi(int asi, int size, int sign)
break;
case 0x01c00f00: /* MBus port address register */
if (size == 8) {
- ret = env->mxccregs[7];
- T0 = env->mxccregs[7] >> 32;
+ ret = env->mxccregs[7] >> 32;
+ T0 = env->mxccregs[7];
} else
DPRINTF_MXCC("%08x: unimplemented access size: %d\n", T0, size);
break;
--
2.30.2