From d36893362d22ff46fdb105ebab12df00bbf23397 Mon Sep 17 00:00:00 2001 From: Kevin Wang <kevin1.wang@amd.com> Date: Thu, 11 Jul 2019 21:33:17 +0800 Subject: [PATCH] drm/amd/powerplay: fix smu clock type change miss error in the smu module, use the smu_xxxclk type to identify the CLK type use SMU_SCLK, SMU_MCLK to replace PP_SCLK, PP_MCLK. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> --- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c index 3093917adc2d3..c382eb9011784 100644 --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c @@ -1385,8 +1385,8 @@ int smu_adjust_power_state_dynamic(struct smu_context *smu, &soc_mask); if (ret) return ret; - smu_force_clk_levels(smu, PP_SCLK, 1 << sclk_mask); - smu_force_clk_levels(smu, PP_MCLK, 1 << mclk_mask); + smu_force_clk_levels(smu, SMU_SCLK, 1 << sclk_mask); + smu_force_clk_levels(smu, SMU_MCLK, 1 << mclk_mask); break; case AMD_DPM_FORCED_LEVEL_MANUAL: -- 2.30.2