From d682a353f37072632c8b51d2a5cd3f9374d749f4 Mon Sep 17 00:00:00 2001 From: Likun Gao Date: Fri, 23 Aug 2019 14:35:45 +0800 Subject: [PATCH] drm/amdgpu: correct SDMA3 IH clinet id for sienna_cichlid Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 4 ++-- drivers/gpu/drm/amd/include/soc15_ih_clientid.h | 1 + 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c index b9b218ba01baf..5a47f105cd14a 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c @@ -1166,7 +1166,7 @@ static int sdma_v5_2_sw_init(void *handle) return r; /* SDMA trap event */ - r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_SDMA3, + r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_SDMA3_Sienna_Cichlid, SDMA3_5_0__SRCID__SDMA_TRAP, &adev->sdma.trap_irq); if (r) @@ -1408,7 +1408,7 @@ static int sdma_v5_2_process_trap_irq(struct amdgpu_device *adev, break; } break; - case SOC15_IH_CLIENTID_SDMA3: + case SOC15_IH_CLIENTID_SDMA3_Sienna_Cichlid: switch (entry->ring_id) { case 0: amdgpu_fence_process(&adev->sdma.instance[3].ring); diff --git a/drivers/gpu/drm/amd/include/soc15_ih_clientid.h b/drivers/gpu/drm/amd/include/soc15_ih_clientid.h index 1794ad1fc4fcc..fb67bb55ed793 100644 --- a/drivers/gpu/drm/amd/include/soc15_ih_clientid.h +++ b/drivers/gpu/drm/amd/include/soc15_ih_clientid.h @@ -66,6 +66,7 @@ enum soc15_ih_clientid { SOC15_IH_CLIENTID_VCN1 = SOC15_IH_CLIENTID_UVD1, SOC15_IH_CLIENTID_SDMA2 = SOC15_IH_CLIENTID_ACP, SOC15_IH_CLIENTID_SDMA3 = SOC15_IH_CLIENTID_DCE, + SOC15_IH_CLIENTID_SDMA3_Sienna_Cichlid = SOC15_IH_CLIENTID_ISP, SOC15_IH_CLIENTID_SDMA4 = SOC15_IH_CLIENTID_ISP, SOC15_IH_CLIENTID_SDMA5 = SOC15_IH_CLIENTID_VCE0, SOC15_IH_CLIENTID_SDMA6 = SOC15_IH_CLIENTID_XDMA, -- 2.30.2