From d6a2cc9a80c2fdc10f7fde3f5f57c72e99f3bd5e Mon Sep 17 00:00:00 2001 From: Syed Saba Kareem Date: Thu, 21 Jul 2022 11:39:58 +0530 Subject: [PATCH] ASoC: amd: add RPL Platform acp header file Add ACP register header file for RPL platform. Signed-off-by: Syed Saba Kareem Reviewed-by: Vijendar Mukunda Link: https://lore.kernel.org/r/20220721061035.91139-1-Syed.SabaKareem@amd.com Signed-off-by: Mark Brown --- .../soc/amd/rpl/rpl_acp6x_chip_offset_byte.h | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 sound/soc/amd/rpl/rpl_acp6x_chip_offset_byte.h diff --git a/sound/soc/amd/rpl/rpl_acp6x_chip_offset_byte.h b/sound/soc/amd/rpl/rpl_acp6x_chip_offset_byte.h new file mode 100644 index 0000000000000..456498f5396de --- /dev/null +++ b/sound/soc/amd/rpl/rpl_acp6x_chip_offset_byte.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * AMD ACP 6.2 Register Documentation + * + * Copyright 2022 Advanced Micro Devices, Inc. + */ + +#ifndef _rpl_acp6x_OFFSET_HEADER +#define _rpl_acp6x_OFFSET_HEADER + +/* Registers from ACP_CLKRST block */ +#define ACP_SOFT_RESET 0x1241000 +#define ACP_CONTROL 0x1241004 +#define ACP_STATUS 0x1241008 +#define ACP_DYNAMIC_CG_MASTER_CONTROL 0x1241010 +#define ACP_PGFSM_CONTROL 0x124101C +#define ACP_PGFSM_STATUS 0x1241020 +#define ACP_CLKMUX_SEL 0x1241024 + +/* Registers from ACP_AON block */ +#define ACP_PME_EN 0x1241400 +#define ACP_DEVICE_STATE 0x1241404 +#define AZ_DEVICE_STATE 0x1241408 +#define ACP_PIN_CONFIG 0x1241440 +#define ACP_PAD_PULLUP_CTRL 0x1241444 +#define ACP_PAD_PULLDOWN_CTRL 0x1241448 +#define ACP_PAD_DRIVE_STRENGTH_CTRL 0x124144C +#define ACP_PAD_SCHMEN_CTRL 0x1241450 + +#endif -- 2.30.2