From d8764d347bd737efec00fae81133ffad0ae084bb Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 31 Jan 2024 10:17:28 +0100 Subject: [PATCH] dt-bindings: firmware: xilinx: Describe soc-nvmem subnode Describe soc-nvmem subnode as the part of firmware node. The name can't be pure nvmem because dt-schema already defines it as array property that's why different name should be used. Acked-by: Conor Dooley Link: https://lore.kernel.org/r/24fe6adbf2424360618e8f5ca541ebfd8bb0723e.1706692641.git.michal.simek@amd.com Signed-off-by: Michal Simek --- .../firmware/xilinx/xlnx,zynqmp-firmware.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml index 7586fbff7ad6f..ab8f32c440dfa 100644 --- a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml +++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml @@ -62,6 +62,12 @@ properties: interface. type: object + soc-nvmem: + $ref: /schemas/nvmem/xlnx,zynqmp-nvmem.yaml# + description: The ZynqMP MPSoC provides access to the hardware related data + like SOC revision, IDCODE and specific purpose efuses. + type: object + pcap: $ref: /schemas/fpga/xlnx,zynqmp-pcap-fpga.yaml description: The ZynqMP SoC uses the PCAP (Processor Configuration Port) to @@ -110,6 +116,18 @@ examples: firmware { zynqmp_firmware: zynqmp-firmware { #power-domain-cells = <1>; + soc-nvmem { + compatible = "xlnx,zynqmp-nvmem-fw"; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + soc_revision: soc-revision@0 { + reg = <0x0 0x4>; + }; + }; + }; gpio { compatible = "xlnx,zynqmp-gpio-modepin"; gpio-controller; -- 2.30.2