From db2c35aa68efba93333de3500c607382f0d0d679 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 24 Jul 2023 15:58:27 +0800 Subject: [PATCH] arm64: dts: imx8ulp: add cpuidle node Add cpuidle node and enable cpuidle for dual cores. The HW mode in Arm Trusted Firmware is SoC Application Power Domain Sleep mode. Signed-off-by: Jacky Bai Signed-off-by: Peng Fan Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi index 8891b4dc3beaf..17cbe526a5b0b 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -40,6 +40,7 @@ reg = <0x0 0x0>; enable-method = "psci"; next-level-cache = <&A35_L2>; + cpu-idle-states = <&cpu_sleep>; }; A35_1: cpu@1 { @@ -48,6 +49,7 @@ reg = <0x0 0x1>; enable-method = "psci"; next-level-cache = <&A35_L2>; + cpu-idle-states = <&cpu_sleep>; }; A35_L2: l2-cache0 { @@ -55,6 +57,19 @@ cache-level = <2>; cache-unified; }; + + idle-states { + entry-method = "psci"; + + cpu_sleep: cpu-sleep { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0>; + local-timer-stop; + entry-latency-us = <1000>; + exit-latency-us = <700>; + min-residency-us = <2700>; + }; + }; }; gic: interrupt-controller@2d400000 { -- 2.30.2