From dbcbeed94f3b6f7f24349a7f335cc603a682e7a7 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Wed, 16 Mar 2022 18:06:39 -0700 Subject: [PATCH] arm64: dts: qcom: sc7280-herobrine: Drop outputs on fpmcu pins Having these pins with outputs is good on a fresh boot because it puts the boot and reset pins in a known "good" state. Unfortunately, that conflicts with the fingerprint firmware flashing code. The firmware flashing process binds and unbinds the cros-ec and spidev drivers and that reapplies the pin output values after the flashing code has overridden the gpio values. This causes a problem because we try to put the device into bootloader mode, bind the spidev driver and that inadvertently puts it right back into normal boot mode, breaking the flashing process. Fix this by removing the outputs. We'll introduce a binding for fingerprint cros-ec specifically to set the gpios properly via gpio APIs during cros-ec driver probe instead. Cc: Douglas Anderson Cc: Matthias Kaehlcke Cc: Alexandru M Stan Fixes: 116f7cc43d28 ("arm64: dts: qcom: sc7280: Add herobrine-r1") Signed-off-by: Stephen Boyd Reviewed-by: Douglas Anderson Reviewed-by: Matthias Kaehlcke Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220317010640.2498502-2-swboyd@chromium.org --- arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi index 3d9b870d440b8..10de5e104b4f9 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi @@ -727,7 +727,6 @@ ap_ec_spi: &spi10 { function = "gpio"; bias-disable; drive-strength = <2>; - output-high; }; fp_to_ap_irq_l: fp-to-ap-irq-l { @@ -741,7 +740,6 @@ ap_ec_spi: &spi10 { pins = "gpio68"; function = "gpio"; bias-disable; - output-low; }; gsc_ap_int_odl: gsc-ap-int-odl { -- 2.30.2