From e80e70fb05709f79a0ae9ac6e0b310c044001a11 Mon Sep 17 00:00:00 2001 From: Eddie James Date: Wed, 20 Oct 2021 16:53:19 -0500 Subject: [PATCH] ARM: dts: aspeed: everest: Add I2C switch on bus 8 The switch controls two busses containing some VRMs. Signed-off-by: Eddie James Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20211020215321.33960-4-eajames@linux.ibm.com Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | 23 ++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts index 01f734105efff..6a432bc4eafc4 100644 --- a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts @@ -108,6 +108,8 @@ i2c44 = &i2c15mux2chn1; i2c45 = &i2c15mux2chn2; i2c46 = &i2c15mux2chn3; + i2c47 = &i2c8mux0chn0; + i2c48 = &i2c8mux0chn1; serial4 = &uart5; @@ -1782,6 +1784,27 @@ compatible = "atmel,24c128"; reg = <0x50>; }; + + i2c-switch@70 { + compatible = "nxp,pca9546"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + i2c-mux-idle-disconnect; + + i2c8mux0chn0: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + i2c8mux0chn1: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + }; }; &i2c9 { -- 2.30.2