From ec888e6cff94af8fc5889824d98b1f1df65f3131 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 16 Apr 2023 14:37:29 +0200 Subject: [PATCH] arm64: dts: qcom: sm8550-qrd: add missing PCIE1 PHY AUX clock frequency The SM8550 DTSI defines a fixed PCIE1 PHY AUX clock and expects boards to define frequency. Use the same as in MTP8550 to fix: sm8550-qrd.dtb: pcie-1-phy-aux-clk: 'clock-frequency' is a required property Signed-off-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230416123730.300863-5-krzysztof.kozlowski@linaro.org --- arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts index ade6ba53ae6bc..8669d29144bb0 100644 --- a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts @@ -521,6 +521,10 @@ vdd3-supply = <&vreg_l5b_3p1>; }; +&pcie_1_phy_aux_clk { + clock-frequency = <1000>; +}; + &qupv3_id_0 { status = "okay"; }; -- 2.30.2