From eccdac07ae300bbe31ab4230a5ac522c1044d0e1 Mon Sep 17 00:00:00 2001 From: Krishna Manikandan Date: Fri, 20 Mar 2020 18:41:04 +0530 Subject: [PATCH] arm64: dts: qcom: sc7180: modify assigned clocks for sc7180 target Add DISP_CC_MDSS_ROT_CLK and DISP_CC_MDSS_AHB_CLK in the assigned clocks list as these are display specific clocks and needs to be initialized from the client side. Adding the default rate of 19.2 mhz for these clocks for sc7180 target. Signed-off-by: Krishna Manikandan Link: https://lore.kernel.org/r/1584709864-5587-1-git-send-email-mkrishn@codeaurora.org Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 86e868af74d65..be5cb4a716753 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -1545,8 +1545,12 @@ clock-names = "iface", "rot", "lut", "core", "vsync"; assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>, - <&dispcc DISP_CC_MDSS_VSYNC_CLK>; + <&dispcc DISP_CC_MDSS_VSYNC_CLK>, + <&dispcc DISP_CC_MDSS_ROT_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>; assigned-clock-rates = <300000000>, + <19200000>, + <19200000>, <19200000>; interrupt-parent = <&mdss>; -- 2.30.2