From eed4bbd388f169c551cc8989ec4379bf55b0ab9b Mon Sep 17 00:00:00 2001 From: Hawking Zhang Date: Tue, 1 Dec 2020 23:50:51 +0800 Subject: [PATCH] drm/amdgpu: correct IH_CHICKEN programming for aldebaran MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit For aldebaran, psp firmware won't program IH_CHICKEN. it now depends on driver to program it properly so either bus address or gpu virtual address is just working for ih ring. Signed-off-by: Hawking Zhang Acked-by: Christian König Acked-by: Felix Kuehling Reviewed-by: Dennis Li Reviewed-by: Feifei Xu Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/vega20_ih.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c index 5a3c867d58811..0049f048a3051 100644 --- a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c +++ b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c @@ -35,6 +35,9 @@ #define MAX_REARM_RETRY 10 +#define mmIH_CHICKEN_ALDEBARAN 0x18d +#define mmIH_CHICKEN_ALDEBARAN_BASE_IDX 0 + static void vega20_ih_set_interrupt_funcs(struct amdgpu_device *adev); /** @@ -316,6 +319,18 @@ static int vega20_ih_irq_init(struct amdgpu_device *adev) WREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN, ih_chicken); } + /* psp firmware won't program IH_CHICKEN for aldebaran + * driver needs to program it properly according to + * MC_SPACE type in IH_RB_CNTL */ + if (adev->asic_type == CHIP_ALDEBARAN) { + ih_chicken = RREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN_ALDEBARAN); + if (adev->irq.ih.use_bus_addr) { + ih_chicken = REG_SET_FIELD(ih_chicken, IH_CHICKEN, + MC_SPACE_GPA_ENABLE, 1); + } + WREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN_ALDEBARAN, ih_chicken); + } + for (i = 0; i < ARRAY_SIZE(ih); i++) { if (ih[i]->ring_size) { if (i == 1) -- 2.30.2