From f2b2f86a8bd19feb70649abf8a63d639f4c838d8 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 17 Jan 2024 16:04:23 +0200 Subject: [PATCH] dt-bindings: phy: qcom,msm8998-qmp-usb3-phy: add TCSR registers The QMP USB PHYs on msm8998, qcm2290 and some other platforms don't have the PCS_MISC_CLAMP_ENABLE register. Instead they need to toggle the register in the TCSR space. Declare the registers accessible through the TCSR space. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20240117-usbc-phy-vls-clamp-v2-2-a950c223f10f@linaro.org Signed-off-by: Vinod Koul --- .../bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml index da5d4cbca24c0..140843347d1ed 100644 --- a/Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml @@ -55,6 +55,14 @@ properties: Flag the PHY as possible handler of USB Type-C orientation switching type: boolean + qcom,tcsr-reg: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to TCSR hardware block + - description: offset of the VLS CLAMP register + description: Clamp register present in the TCSR + ports: $ref: /schemas/graph.yaml#/properties/ports properties: @@ -78,6 +86,7 @@ required: - "#clock-cells" - clock-output-names - "#phy-cells" + - qcom,tcsr-reg allOf: - if: @@ -148,6 +157,8 @@ examples: orientation-switch; + qcom,tcsr-reg = <&tcsr_regs_1 0x6b244>; + ports { #address-cells = <1>; #size-cells = <0>; -- 2.30.2