From f3b770f7a8b439136c71c24dbfc408a0086c6326 Mon Sep 17 00:00:00 2001 From: Marijn Suijten Date: Sat, 17 Dec 2022 00:34:08 +0100 Subject: [PATCH] arm64: dts: qcom: sm6125-seine: Enable GPI DMA 0, QUP 0 and I2C SEs Enable I2C Serial Engines 1, 2 and 3 which are known to have hardware connected to them, leaving the rest disabled to save on power. For this, only GPI DMA 0 and QUP 0 need to be enabled, as nothing seems to be connected to Serial Engines on GPU DMA 1 / QUP 1. Beyond this downstream only defines a UART console available on Serial Engine 4 which also resides on QUP 0. Signed-off-by: Marijn Suijten Reviewed-by: Martin Botka Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221216233408.1283581-4-marijn.suijten@somainline.org --- .../qcom/sm6125-sony-xperia-seine-pdx201.dts | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts index 637a5b2695af4..ef8ad6cb9f054 100644 --- a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts +++ b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts @@ -147,6 +147,10 @@ }; }; +&gpi_dma0 { + status = "okay"; +}; + &hsusb_phy1 { vdd-supply = <&pm6125_l7>; vdda-pll-supply = <&pm6125_l10>; @@ -154,6 +158,27 @@ status = "okay"; }; +&i2c1 { + clock-frequency = <400000>; + status = "okay"; + + /* NXP PN553 NFC @ 28 */ +}; + +&i2c2 { + clock-frequency = <400000>; + status = "okay"; + + /* Samsung touchscreen @ 48 */ +}; + +&i2c3 { + clock-frequency = <1000000>; + status = "okay"; + + /* Cirrus Logic CS35L41 boosted audio amplifier @ 40 */ +}; + &pm6125_adc { pinctrl-names = "default"; pinctrl-0 = <&camera_flash_therm &emmc_ufs_therm &rf_pa1_therm>; @@ -398,6 +423,10 @@ }; }; +&qupv3_id_0 { + status = "okay"; +}; + &sdc2_off_state { sd-cd-pins { pins = "gpio98"; -- 2.30.2