From f82c48d468521cd9d1a31797c6f9e6cac6f7c1b3 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Sat, 4 Jun 2022 17:30:03 +0200
Subject: [PATCH] arm64: dts: qcom: ipq6018: correct QUP peripheral labels
Current QUP peripheral labels like spi_0 and i2c_0 dont really tell what is
the exact QUP HW being used as there are actually 6 identical QUP HW blocks
for UART, SPI and I2C.
For example current i2c_0 label actually points to the QUP2 I2C HW.
This style of labeling does not follow what the rest of Qualcomm SoC-s use,
for example IPQ8074 which has the identical QUP blocks.
It also makes it really hard to add the missing QUP DT nodes as there are
multiple missing.
So utilize the same style as other Qualcomm SoC-s are using and update the
CP01 DTS as its the current sole user of them.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220604153003.55172-1-robimarko@gmail.com
---
arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 4 ++--
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 8 ++++----
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
index d9a8c2e68ae17..1ba2eca33c7b6 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
+++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
@@ -29,13 +29,13 @@
status = "okay";
};
-&i2c_1 {
+&blsp1_i2c3 {
pinctrl-0 = <&i2c_1_pins>;
pinctrl-names = "default";
status = "okay";
};
-&spi_0 {
+&blsp1_spi1 {
cs-select = <0>;
status = "okay";
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 7b6c27265a771..a23294ab1cad7 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -282,7 +282,7 @@
status = "disabled";
};
- spi_0: spi@78b5000 {
+ blsp1_spi1: spi@78b5000 {
compatible = "qcom,spi-qup-v2.2.1";
#address-cells = <1>;
#size-cells = <0>;
@@ -297,7 +297,7 @@
status = "disabled";
};
- spi_1: spi@78b6000 {
+ blsp1_spi2: spi@78b6000 {
compatible = "qcom,spi-qup-v2.2.1";
#address-cells = <1>;
#size-cells = <0>;
@@ -312,7 +312,7 @@
status = "disabled";
};
- i2c_0: i2c@78b6000 {
+ blsp1_i2c2: i2c@78b6000 {
compatible = "qcom,i2c-qup-v2.2.1";
#address-cells = <1>;
#size-cells = <0>;
@@ -327,7 +327,7 @@
status = "disabled";
};
- i2c_1: i2c@78b7000 { /* BLSP1 QUP2 */
+ blsp1_i2c3: i2c@78b7000 {
compatible = "qcom,i2c-qup-v2.2.1";
#address-cells = <1>;
#size-cells = <0>;
--
2.30.2