From f92d46ad07064d7b45ebb5f0e983af9b29af2ced Mon Sep 17 00:00:00 2001 From: Alistair Francis Date: Tue, 19 May 2020 11:04:12 -0700 Subject: [PATCH] target/riscv: Don't overwrite the reset vector The reset vector is set in the init function don't set it again in realize. Signed-off-by: Alistair Francis Reviewed-by: Bin Meng --- target/riscv/cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index eeb91f8513..55a180edf9 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -133,6 +133,7 @@ static void riscv_base32_cpu_init(Object *obj) CPURISCVState *env = &RISCV_CPU(obj)->env; /* We set this in the realise function */ set_misa(env, 0); + set_resetvec(env, DEFAULT_RSTVEC); } static void rv32gcsu_priv1_10_0_cpu_init(Object *obj) @@ -170,6 +171,7 @@ static void riscv_base64_cpu_init(Object *obj) CPURISCVState *env = &RISCV_CPU(obj)->env; /* We set this in the realise function */ set_misa(env, 0); + set_resetvec(env, DEFAULT_RSTVEC); } static void rv64gcsu_priv1_10_0_cpu_init(Object *obj) @@ -377,7 +379,6 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) } set_priv_version(env, priv_version); - set_resetvec(env, DEFAULT_RSTVEC); if (cpu->cfg.mmu) { set_feature(env, RISCV_FEATURE_MMU); -- 2.30.2