From fc9e01676cc4eae0a66a8b5ee60cda68537718b6 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 8 Jun 2022 15:48:34 +0200 Subject: [PATCH] dt-bindings: clock: renesas,rzg2l: Simplify header file references The bindings already uses to refer to the header files with DT binding definitions for core clocks. Use more wildcards to simplify more references to these files. Signed-off-by: Geert Uytterhoeven Acked-by: Rob Herring Link: https://lore.kernel.org/r/f274ad16010798dd4a45d2dca5f870da8acbb470.1654696009.git.geert+renesas@glider.be --- .../devicetree/bindings/clock/renesas,rzg2l-cpg.yaml | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml b/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml index 8880b834f264c..d036675e0779a 100644 --- a/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml @@ -45,10 +45,9 @@ properties: description: | - For CPG core clocks, the two clock specifier cells must be "CPG_CORE" and a core clock reference, as defined in - + , - For module clocks, the two clock specifier cells must be "CPG_MOD" and - a module number, as defined in the or - . + a module number, as defined in . const: 2 '#power-domain-cells': @@ -62,7 +61,7 @@ properties: '#reset-cells': description: The single reset specifier cell must be the module number, as defined in - the or . + . const: 1 required: -- 2.30.2