From fff7eb56b376cadc58af14df286009086cc4d80f Mon Sep 17 00:00:00 2001 From: Alvin Lee Date: Thu, 16 Jun 2022 10:58:08 -0400 Subject: [PATCH] drm/amd/display: Don't set dram clock change requirement for SubVP [Description] In general cases we want to keep the dram clock change requirement (we prefer configs that support MCLK switch). Only override to false for SubVP. Reviewed-by: Jun Lei Acked-by: Rodrigo Siqueira Signed-off-by: Alvin Lee Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h | 1 + drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h b/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h index b5d7e251ed812..87c9b9f9976e5 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h +++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h @@ -184,6 +184,7 @@ struct _vcs_dpi_soc_bounding_box_st { double max_avg_fabric_bw_use_normal_percent; double max_avg_dram_bw_use_normal_strobe_percent; enum dm_prefetch_modes allow_for_pstate_or_stutter_in_vblank_final; + bool dram_clock_change_requirement_final; double writeback_latency_us; double ideal_dram_bw_after_urgent_percent; double pct_ideal_dram_sdp_bw_after_urgent_pixel_only; // PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelDataOnly diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c index 5185c2ccdfd57..95edca4c085b2 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c +++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c @@ -343,7 +343,7 @@ static void fetch_socbb_params(struct display_mode_lib *mode_lib) mode_lib->vba.MaxAveragePercentOfIdealDRAMBWDisplayCanUseInNormalSystemOperationSTROBE = soc->max_avg_dram_bw_use_normal_strobe_percent; - mode_lib->vba.DRAMClockChangeRequirementFinal = 1; + mode_lib->vba.DRAMClockChangeRequirementFinal = soc->dram_clock_change_requirement_final; mode_lib->vba.FCLKChangeRequirementFinal = 1; mode_lib->vba.USRRetrainingRequiredFinal = 1; mode_lib->vba.ConfigurableDETSizeEnFinal = 0; -- 2.30.2